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Date   : Mon, 04 Dec 1995 20:53:14 +0000 (GMT)
From   : James Fidell <james@...>
Subject: Re: Screen timing/VSYNC interrupt/BeebDOS

My alter (working) ego wrote:

> > 2. The VSYNC interrupt
> > 
> > Does the 6522 just generate this every X cycles, or does it get a
> > signal from the video circuitry to tell it that the time has come?
> > I'm assuming that it gets a signal from the video circuitry
> > (otherwise it would start being less accurate if you switched
> > between interlaced and non-interlaced modes), but I'd like to check
> > this all the same.
> 
> I believe that the video circuitry is responsible for generating this
> as an input to the system VIA on CA1 (which then generates the software
> interrupt).

Checking in the AUG indicates that this is correct.  Chapter 23 "The System
VIA", page 417, section "CA1 input" says :

    This is the vertical sync interrupt from the 6845.  CA1 is set up to
    interrupt ... as a vertical sync from the video circuitry is detected.

James.

-- 
 "Yield to temptation --             | Work: james@...      
  it may not pass your way again"    | Play: james@...                 
                                     | http://www.OiT.co.uk/~james/
        - Lazarus Long               |              James Fidell


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